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  1 datasheet caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas llc 2013, 2014, 2016. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. high efficiency buck-boost regulator with 4.5a switches isl91110 the isl91110 is a high-current buck-boost switching regulator for systems using new battery chemistries. it uses intersil?s proprietary buck-boost algorithm to maintain voltage regulation while providing excellent efficiency and very low output voltage ripple when the input voltage is close to the output voltage. the isl91110 is capable of delive ring at least 2a continuous output current (v out = 3.3v) over a battery voltage range of 2.5v to 4.35v. this maximizes the energy utilization of advanced single-cell li-ion battery chemistries that have significant capacity left at voltages below the system voltage. its fully synchronous low on-resistance 4-switch architecture and a low quiescent current of only 35a op timize efficiency under all load conditions. the isl91110 supports standalone a pplications with a fixed 3.3v or 3.5v output voltage or adju stable output voltage with an external resistor divider. output voltages as low as 1.0v or as high as 5.2v are supported. the isl91110 is available in a 25-bump, 0.4mm pitch wlcsp (2.33mmx2.07mm) and a 2.5mhz switching frequency, which further reduces the size of external components. features ? accepts input voltages above or below regulated output voltage ? automatic and seamless transitions between buck and boost modes ? input voltage range: 1.8v to 5.5v ? output current: up to 2a (pvin = 2.5v, v out = 3.3v) ? burst current: up to 3a (pvin = 3v, v out = 3.3v, t on < 600s, t = 4.6ms) ? high efficiency: up to 96% ? 35a quiescent current maximizes light-load efficiency ? 2.5mhz switching frequency mi nimizes external component size ? fully protected for short-circuit, over-temperature, and undervoltage ? small 2.33mmx2.07mm wlcsp applications ? brownout free system voltage for smartphones and tablet pcs ? wireless communication devices ? 2g/3g/4g rf power amplifiers related literature ? an1912 ?isl91110iin-evz, isl91110ii2a-evz, isl91110iia-evz evaluation boards? figure 1. typical application: v out = 3.3v figure 2. efficiency: v out = 3.3v, t a = +25 c pvin v in = 1.8v to 5.5v v out = 3.3v i out = up to 3a isl91110iinz vin en lx1 lx2 vout fb sgnd pgnd c 1 2x10f l 1 1h c 2 2x22f mode note: confirm with intersil applications engineer for any deviation fr om a bo ve ci rc ui t 75 80 85 90 95 100 1 10 100 1000 load current (ma) efficiency (%) v in = 3.3v v in = 4.0v v in = 3.6v v in = 3.0v v in = 2.5v february 5, 2016 fn8434.4
isl91110 2 fn8434.4 february 5, 2016 submit document feedback block diagram osc error amp pvin control vin monitor lx1 v ref ref reverse current vout d2 gate drivers & anti- shoot thru a5 vin thermal shutdown current detect e2 b5 en e5 fb c2 pgnd sgnd en en en en vout clamp voltage prog. d1 lx2 e3 c3 d3 comp mode d3 e1 c1 q1 q2 q3 q4 adj output fixed output d4 b2 b1 b3 b4 a2 a1 a3 a4 e4 d5 c5 figure 3. block diagram
isl91110 3 fn8434.4 february 5, 2016 submit document feedback pin configuration isl91110 (25 ball wlcsp, 0.4mm pitch) top view, bumps down 1 2345 a b c d e pvin pvin pvin pvin lx1 lx1 lx1 lx1 pgnd pgnd pgnd lx2 lx2 lx2 lx2 vout vout vout vout mode vin en sgnd sgnd fb pin descriptions pin # pin names description a1, a2, a3, a4 pvin power input; range: 1.8v to 5.5v. connect 2x10 f capacitors to pgnd. b1, b2, b3, b4 lx1 inductor connection, input side c1, c2, c3 pgnd power ground for high switching current d1, d2, d3, d4 lx2 inductor connection, output side e1, e2, e3, e4 vout buck-boost regulator output; connect 2x22 f capacitors to pgnd. c4 mode logic input, high for auto pfm mode. low for forced pwm operation. also, this pin can be used with an external clock sync input. range: 2.75mhz to 3.25mhz. a5 vin supply input; range: 1.8v to 5.5v. b5 en logic input, drive high to enable device. c5, d5 sgnd analog ground pin e5 fb voltage feedback pin ordering information part number ( notes 1 , 2 , 3 ) part marking output voltage (v) tape and reel options temp range (c) package (rohs compliant) pkg. dwg. # isl91110iinz-t 110n 3.3 3k -40 to +85 25 ball wlcsp w5x5.25e isl91110iinz-t7a 110n 3.3 250 -40 to +85 25 ball wlcsp w5x5.25e ISL91110II2AZ-T 102a 3.5 3k -40 to +85 25 ball wlcsp w5x5.25e ISL91110II2AZ-T7a 102a 3.5 250 -40 to +85 25 ball wlcsp w5x5.25e isl91110iiaz-t 110a adj 3k -40 to +85 25 ball wlcsp w5x5.25e isl91110iiaz-t7a 110a adj 250 -40 to +85 25 ball wlcsp w5x5.25e isl91110iia-evz evaluation board for isl91110iiaz notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free wlcsp and bga packaged products employ special pb-free material sets; molding compounds/die attach mat erials and snagcu - e1 solder ball terminals, which are rohs compliant an d compatible with both snpb and pb-free soldering operations. int ersil pb-free wlcsp and bga packaged products are msl classified at pb-free pe ak reflow temperatures that meet or exceed the pb-free requirem ents of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see product information page for isl91110 . for more information on msl please see techbrief tb363 . table 1. key differences between family of parts part number peak current limit r ds(on) pfet r ds(on) nfet hiccup mode package thermal resistance isl91110 4.5a 40m 30m yes 25-bump 2.33x2.07mm wlcsp ? jb 13 c/w isl91110ir 5.4a 47m 40m no 20 ld 4x4mm tqfn ? jc 4 c/w
isl91110 4 fn8434.4 february 5, 2016 submit document feedback absolute maximum rating s thermal information pvin, vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v lx1, lx2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v fb (adjustable version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 2.7v fb (fixed v out versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v gnd, pgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 0.3v all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v esd rating human body model (tested per jesd22-a114e) . . . . . . . . . . . . . . . . 3kv machine model (tested per jesd22-a115-a) . . . . . . . . . . . . . . . . . 250v latch-up (tested per jesd-78b; class 2, level a) . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jb (c/w) 25 ball wlcsp package ( notes 4 , 5 ) . . . . 66 13 maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c supply voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8v to 5.5v max load current (v in = 2.5v v out = 3.3v) . . . . . . . . . . . . . . . . . . . . . 2adc max load current (v in = 3.0v v out = 3.3v, t on = 600s, t = 4.6ms). . . . . . 3a caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ? ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 . 5. for ? jb , the board temp is taken on the board near the edge of the package, on a trace at the middle of one side. see tech brief tb379 . analog specifications v in = v pvin = v en = 3.6v, v out = 3.3v, l1 = 1h, c1 = 2x10f, c2 = 2x22f, t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c and input voltage range (1.8v to 5.5v) unless specified otherwise. symbol parameter test conditions min ( note 6 ) typ ( note 7 ) max ( note 6 )unit power supply v in input voltage range 1.8 5.5 v v uvlo v in undervoltage lockout threshold rising 1.725 1.775 v falling 1.550 1.650 v i vin v in supply current pfm mode, no external load on v out ( note 8 )35 60 a i sd v in supply current, shutdown en = gnd, v in = 3.6v 0.05 1.00 a output voltage regulation v out output voltage range isl91110iiaz, i out = 100ma, v in = 3.6v 1.00 5.20 v output voltage accuracy v in = 3.7v, v out = 3.3v, i out = 0ma, pwm mode -2 +2 % v in = 3.7v, v out = 3.3v, i out = 1ma, pfm mode -3 +4 % v fb fb pin voltage regulation for adjustable output version, v in = 3.6v 0.783 0.800 0.813 v i fb fb pin bias current for adjustable output version 20 na ? v out / ? v in line regulation, pwm mode i out = 500ma, v out = 3.3v, v in step from 2.3v to 5.5v 5 mv/v ? v out / ? i out load regulation, pwm mode v in = 3.7v, v out = 3.3v, i out step from 0ma to 1000ma 0.005 mv/ma ? v out / ? v i line regulation, pfm mode i out = 100ma, v out = 3.3v, v in step from 2.3v to 5.5v 12.5 mv/v ? v out / ? i out load regulation, pfm mode v in = 3.7v, v out = 3.3v, i out step from 0ma to 100ma 0.4 mv/ma v clamp output voltage clamp rising 5.25 5.95 v output voltage clamp hysteresis 400 mv dc/dc switching specifications f sw oscillator frequency 2.10 2.50 2.90 mhz t onmin minimum on time 80 ns i pfetleak lx1 pin leakage current v in = 3.6v -1 1 a i nfetleak lx2 pin leakage current v in = 3.6v -1 1 a
isl91110 5 fn8434.4 february 5, 2016 submit document feedback soft-start and soft discharge t ss soft-start time time from when en signal asserts to when output voltage ramp starts. 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in buck mode. v in = 4v, v out = 3.3v, i o = 200ma 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in boost mode. v in = 2v, v out = 3.3v, i o = 200ma 2ms r dischg v out soft-discharge on-resistance en < v il 120 power mosfet r dson_p p-channel mosfet on-resistance v in = 3.6v, i o = 200ma 40 m v in = 2.5v, i o = 200ma 55 m r dson_n n-channel mosfet on-resistance v in = 3.6v, i o = 200ma 30 m v in = 2.5v, i o = 200ma 45 m i pk_lmt p-channel mosfet peak current limit 3.9 4.5 5.1 a pfm/pwm transition load current threshold, pfm to pwm v in = 3.6v, v out = 3.3v 200 ma load current threshold, pwm to pfm v in = 3.6v, v out = 3.3v 75 ma thermal shutdown 155 c thermal shutdown hysteresis 30 c logic inputs i leak input leakage v in = 3.6v 0.05 1.00 a v ih input high voltage v in = 3.6v 1.4 v v il input low voltage v in = 3.6v 0.4 v notes: 6. parameters with min and/or max limits are 100% tested at +25c , unless otherwise specified. te mperature limits established by characterization and are not production tested. 7. typical values are for t a = +25c and v in = 3.6v. 8. quiescent current measurements are taken when the output is not switching. analog specifications v in = v pvin = v en = 3.6v, v out = 3.3v, l1 = 1h, c1 = 2x10f, c2 = 2x22f, t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c and in put voltage range (1.8v to 5.5v) unless specified otherwise. (continued) symbol parameter test conditions min ( note 6 ) typ ( note 7 ) max ( note 6 )unit
isl91110 6 fn8434.4 february 5, 2016 submit document feedback typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a figure 4. efficiency vs input voltage fig ure 5. output voltage vs load current figure 6. quiescent current vs input voltage (v out = 3.3v, mode = high) figure 7. switching frequency vs input voltage figure 8. steady-state operation in pfm (v in = 4v, v out =3.3v, no load) figure 9. steady-state operation in pwm (v in = 3.3v, v out =3.3v, no load) 80 82 84 86 88 90 92 94 96 98 100 2345 efficiency (%) v in (v) load = 10ma load = 1000ma load = 500ma load = 100ma 3.26 3.27 3.28 3.29 3.30 3.31 3.32 1 10 100 1000 load current (ma) v out (v) v in = 3.0v v in = 3.6v v in = 2.5v v in = 4.0v v in = 4.5v t a = -40c t a = +25c t a = +85c 0 10 20 30 40 50 60 70 80 1.5 2.5 3.5 4.5 5.5 v in (v) quiescent current (a) 2.25 2.30 2.35 2.40 2.45 2.50 2.55 1.5 2.5 3.5 4.5 5.5 v in (v) switching frequency (mhz) lx1 (2v/div) lx2 (2v/div) v out (ac, 50mv/div) i l (500ma/div) 400ns/div 400ns/div lx1 (2v/div) lx2 (2v/div) v out (ac, 10mv/div) i l (200ma/div)
isl91110 7 fn8434.4 february 5, 2016 submit document feedback figure 10. soft-start (v in = 3.6v, v out = 3.3v, no load) figure 11. soft-start (v in = 3.6v, v out = 3.3v, 1a r-load) figure 12. steady state operation (v in = 2.5v, v out = 3.3v, 2a load) figure 13. 0a to 2a load transient (v in = 3.6v, v out = 3.3v) figure 14. 0.5a to 1.5a load transient (v in = 3.6v, v out = 3.3v) figure 15. 0a to 1a load transient (v in = 3.6v, v out = 3.3v) typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a (continued) i l (500ma/div) 400s/div v out (1v/div) en (2v/div) i l (500ma/div) 400s/div v out (1v/div) en (2v/div) v out (ac, 20mv/div) lx1 (2v/div) lx2 (2v/div) i l (1a/div) 400ns/div 100s/div v out (ac, 100mv/div) i l (1a/div) v out (ac, 100mv/div) i l (500ma/div) 100s/div v out (ac, 50mv/div) i l (500ma/div) 100s/div
isl91110 8 fn8434.4 february 5, 2016 submit document feedback functional description functional overview refer to the ? block diagram ? on page 2 . the isl91110 implements a complete buck-boost switching regulator, with pwm controller, internal switches, references, protection circuitry and control inputs. the pwm controller automatically switches between buck and boost modes as necessary to maintain a steady output voltage, with changing input voltages and dynamic external loads. internal supply and references referring to the ? block diagram ? on page 2 , the isl91110 provides four power input pins. the pvin pin supplies input power to the dc/dc converter, while the vin pin provides operating voltage source required for stable v ref generation. separate ground pins (gnd and pgnd) are provided to avoid problems caused by ground shift due to the high switching currents. enable input the device is enabled by asserting the en pin high. driving en low invokes a power-down mode, where most internal device functions are disabled. soft discharge when the device is disabled by driving en low, an internal resistor between vout and gnd is activated to slowly discharge the output capacitor. this internal resistor has a typical 120 resistance. por sequence and soft-start asserting the en pin high allows the device to power up. a number of events occur during the start-up sequence. the internal voltage reference powers up, and stabilizes. the device then starts operating. there is a typical 1ms delay between assertion of the en pin and th e start of switching regulator soft-start ramp. the soft-start feature minimizes output voltage overshoot and input inrush currents. during soft -start, the reference voltage is ramped to provide a ramping v out voltage. while the output voltage is lower than approximat ely 20% of the target output voltage, switching frequency is reduced to a fraction of the normal switching frequency to aid in producing low duty cycles necessary to avoid input inrush current spikes. once the output voltage exceeds 20% of the target voltage, switching frequency is increased to its nominal value. when the target output voltage is higher than the input voltage, there will be a transi tion from buck mode to boost mode during the soft-start sequence. at the ti me of this transition, the ramp rate of the reference voltage is decreased, such that the output voltage slew rate is decreased. this provides a slower output voltage slew rate. the v out ramp time is not constant for all operating conditions. soft-start into boost mode will take longer than soft-start into buck mode. the total soft-start time into buck operating mode is typically 2ms, whereas the typical soft-start time into boost mode operating mode is typically 3ms. increasing the load current will increase these typical soft-start times. overcurrent protection the isl91110 provides short-circuit protection by monitoring the feedback voltage. when feedback voltage is sensed to be lower than a certain threshold, the pwm oscillator frequency is reduced in order to protect the device from damage. the p-channel mosfet peak current limit remains active during this state. when the current in the p-channel mosfet is sensed to reach the current limit for 16 consecutive switching cycles, the internal protection circuit is triggered, and switching is stopped for approximately 40ms. the device then performs a soft-start cycle. if the external output overcurrent condition exists after the soft-start cycle, the device will again detect 16 consecutive switching cycles reaching the peak current threshold and turns off for 40ms. the process will repeat as long as the external overcurrent condition is present. this behavior is called ?hiccup mode?. figure 16. output short-circuit behavior (v in = 3.6v, v out =3.3v) figure 17. 4v to 3.2v line transient (v out = 3.3v, load = 1a) typical performance curves unless otherwise noted, operating conditions are: t a = +25c, v in = en = 3.6v, l = 1h, c 1 = 2x10f, c 2 = 2x22f, v out = 3.3v, i out = 0a to 3a (continued) lx2 (2v/div) v out (1v/div) i l (1a/div) lx1 (2v/div) 20ms/div v out (ac, 100mv/div) 10s/div v in (1v/div)
isl91110 9 fn8434.4 february 5, 2016 submit document feedback thermal shutdown a built-in thermal protection feature protects the isl91110 if the die temperature reaches +155c (typical). at this die temperature, the regulator is completely shut down. the die temperature continues to be monitored in this thermal shutdown mode. when the die temperature falls to +125c (typical), the device will resume normal operation. when exiting thermal shutdown, the isl91110 will execute its soft-start sequence. buck-boost conversion topology the isl91110 operates in either buck or boost mode. when operating in conditions where pvin is close to vout, isl91110 alternates between buck and boost mode as necessary to provide a regulated output voltage. figure 18 shows a simplified diagram of the internal switches and external inductor. pwm operation in buck pwm mode, switch d is continuously closed, and switch c is continuously open. switches a and b operate as a synchronous buck converter when in this mode. in boost pwm mode, switch a remains closed and switch b remains open. switches c and d operate as a synchronous boost converter when in this mode. pfm operation during pfm operation in buck mode, switch d is continuously closed and switch c is continuously open. switches a and b operate in discontinuous mode during pfm operation. during pfm operation in boost mode, the isl91110 closes switch a and switch c to ramp up the current in the inductor. when the inductor current reaches a certain threshold, the device turns off switches a and c, then turns on switches b and d. with switches b and d closed, output voltage increases as the inductor current ramps down. in most operating conditions, th ere will be multiple pfm pulses to charge up the output capacito r. these pulses continue until v out has achieved the upper thre shold of the pfm hysteretic controller. switching then stops, and remains stopped until v out decays to the lower threshold of the hysteretic pfm controller. operation with v in close to v out when the output voltage is close to the input voltage, the isl91110 will rapidly and smoothly switch from boost to buck mode as needed to maintain the regulated output voltage. this behavior provides excellent efficiency and very low output voltage ripple. output voltage programming the isl91110 is available in fixed and adjustable output voltage versions. to use the fixed output version, the vout pin must be connected directly to fb. in the adjustable output voltage version (isl91110iiaz), an external resistor divider is required to program the output voltage. the fb pin has very low input leakage current, so it is possible to use large value resistors (e.g., r 1 = 1m and r 2 =324k for v out = 3.3v) in the resistor divider connected to the fb input. applications information component selection the fixed-output version of isl91110 requires only three external power components to implement the buck boost converter: an inductor, an input capacitor and an output capacitor. the adjustable output version of isl91110 requires three additional components to progra m the output voltage, as shown in figure 19 . two external resistors program the output voltage, and a small capacitor is added to improve stability and response. output voltage prog ramming, adjustable version when vref is connected to gnd, setting and controlling the output voltage of the isl91110iiaz (adjustable output version) can be accomplished by selectin g the external resistor values. equation 1 can be used to derive the r 1 and r 2 resistor values: when designing a pcb, include a gnd guard band around the feedback resistor network to reduce noise and improve accuracy and stability. resistors r 1 and r 2 should be positioned close to the fb pin. feed-forward capacitor selection a small capacitor (c3 in figure 19 ) in parallel with resistor r 1 is required to provide the specified load and line regulation. the suggested value of this capacitor is 56pf for r 1 = 1m . an npo type capacitor is recommended. figure 18. buck boost topology pvin vout switch a switch d switch b switch c lx1 lx2 l 1 pvin v in = 1.8v to 5.5v v out = 1v to 5.2v up to 3a isl91110iiaz vin en lx1 lx2 vout fb sgnd pgnd c 1 2x10f l 1 1h c 2 2x22f mode r 1 r 2 c 3 figure 19. adjustable output application v out 0.8v 1 r 1 r 2 ------ - + ?? ?? ?? ? = (eq. 1)
isl91110 10 fn8434.4 february 5, 2016 submit document feedback inductor selection an inductor with high frequency core material (e.g., ferrite core) should be used to minimize core losses and provide good efficiency. the inductor must be able to handle the peak switching currents without saturating. a 1h inductor with 4a saturation current rating is recommended. select an inductor with low dcr to provide good efficiency. in applications where radiated noise must be minimized, a toroidal or shielded inductor can be used. pvin and v out capacitor selection the input and output capacitors should be ceramic x5r type with low esl and esr. the recommended input capacitor value is 2x10f. the recommended v out capacitor value is 2x22f. recommended pcb layout correct pcb layout is critical for proper operation of the isl91110. the input and output capacitors should be positioned as closely to the ic as possible. the ground connections of the input and output capacitors should be kept as short as possible, and should be on the component layer to avoid problems that are caused by high switching currents flowing through pcb vias. table 2. inductor vendor information manufacturer mfr. part number description dimension (mm) website toko 1277as-h-1r0m 1h, 20%, dcr = 34m ?? typ ??? isat = 4.6a (typ) 3.2x2.5x1.2 www.toko.com fdsd0312-h-1r0m 1h, 20%, dcr = 43m ?? typ ??? isat = 4.5a (typ) 3.2x3.0x1.2 coilcraft xfl4020-102me 1h, 20%, dcr = 11m ?? typ ??? isat = 5.1a (typ) 4.0x4.0x2.1 www.coilcraft.com table 3. capacitor vendor information manufacturer series website avx x5r www.avx.com murata x5r www.murata.com taiyo yuden x5r www.t-yuden.com tdk x5r www.tdk.com
isl91110 11 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn8434.4 february 5, 2016 for additional products, see www.intersil.com/en/products.html submit document feedback about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support . revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change february 5, 2016 fn8434.4 added note to figure 1 on page 1. updated pin configuration on page 3 by adding labels. added table 1 on page 3. november 20, 2014 fn8434.3 on page 8, "short circuit protection" sect ion title was updated to "overcu rrent protection." also in th e newly titled "overcurrent protection" section, a paragraph was added to explain hiccup mode operation. october 28, 2014 fn8434.2 on page 1, 3rd paragraph, changed output as low as 0.8v, as high as 5.25v to: "changed output as low as 1.0v, as high as 5.2v". the ic label on figure 19 changed from isl91110inz to isl91110iiaz tjb changed from 14 to 13 in thermal information. august 22, 2014 fn8434.1 updated figure 1 on page 1, changed text from ?"li-ion battery 2.5v to 4.35v" to "vin = 1.8v to 5.5v" and "max. iout = 2a (min)" to "iout = up to 3a" replaced figure 2 on page 1. added -t7a parts to the ?ordering information? table on page 3. changed ?ifb? on page 4, max spec from ?1a to 20na?. changed section title on page 5 from ?en logic inputs? to ?logic inputs?. added ?typical performance curves? on page 6. changed text on figure 19 on page 9, from "vout=0.8v to 5.25v, up to 3a" to "vout = 1v to 5.2v, up to 3a" replaced ?package outline drawing? on page 12. december 24, 2013 fn8434.0 initial release.
isl91110 12 fn8434.4 february 5, 2016 submit document feedback package outline drawing w5x5.25e 5x5 array 25 balls with 0.40 pitch wafe r level chip scale package (with bsc) rev 0, 1/14 bottom view typical recommende d land pattern top view nsmd refers to non-solder mask defined pad design per dimension and tolerance per asmey 14.5m-1994, 3. 2. all dimensions are in millimeters. 1. notes: and jesd 95-1 spp-010. intersil tech brief tb451 located at: http://www.intersil.com/content/dam/intersil/docu- ments/tb45/tb451.pdf side view 0.10 z x y 0.05 z 2.070 0.030 2.330 0.030 y x (4x) 0.10 pin 1 (a1 corner) 25x 0.265 0.035 0.400 e d c b a 0.400 12345 0.235 0.365 1.600 0.240 package outline 0.400 0.290 nsmd 3 0.0400 bsc (back side coating) 0.200 0.03 0.265 0.035 seating plane 0.05 z 0.540 0.050 3 z


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